----------------------------------------------------------------------------
--  xor_xnor.vhd
--	Encode XOR/XNOR
--	Version 1.0
--
--  Copyright (C) 2014 H.Poetzl
--
--	This program is free software: you can redistribute it and/or
--	modify it under the terms of the GNU General Public License
--	as published by the Free Software Foundation, either version
--	2 of the License, or (at your option) any later version.
----------------------------------------------------------------------------


library IEEE;
use IEEE.std_logic_1164.ALL;
use IEEE.numeric_std.ALL;

use work.vivado_pkg.ALL;	-- Vivado Attributes


entity xor_xnor is
    port (
	clk : in std_logic;
	--
	din : in std_logic_vector (7 downto 0);
	--
	xor_out : out std_logic_vector (7 downto 0);
	xnor_out : out std_logic_vector (7 downto 0)
   );
end entity xor_xnor;


architecture RTL of xor_xnor is

    attribute KEEP_HIERARCHY of RTL : architecture is "TRUE";

    signal enc_xor : std_logic_vector (7 downto 0);
    signal enc_xnor : std_logic_vector (7 downto 0);

begin

    enc_xor(0) <= din(0);
    enc_xnor(0) <= din(0);

    -- single LUT layer so it won't get faster than that

    GEN_ENC: for I in 1 to 7 generate
	enc_xor(I) <= din(I) xor enc_xor(I - 1);
	enc_xnor(I) <= din(I) xnor enc_xnor(I - 1);
    end generate;

    register_proc : process (clk)
    begin
	if rising_edge(clk) then
	    xor_out <= enc_xor;
	    xnor_out <= enc_xnor;
	end if;
    end process;

end RTL;