diff -NurpP --minimal linux-2.6.38-rc3-xbox0.11/arch/powerpc/include/asm/atomic.h linux-2.6.38-rc3-xbox0.11.1/arch/powerpc/include/asm/atomic.h
--- linux-2.6.38-rc3-xbox0.11/arch/powerpc/include/asm/atomic.h	2010-11-22 21:40:18.000000000 +0100
+++ linux-2.6.38-rc3-xbox0.11.1/arch/powerpc/include/asm/atomic.h	2011-02-08 08:27:41.000000000 +0100
@@ -34,14 +34,16 @@ static __inline__ void atomic_add(int a,
 	int t;
 
 	__asm__ __volatile__(
-"1:	lwarx	%0,0,%3		# atomic_add\n\
+"1:"	XENON_ATOMIC_PRE
+"	lwarx	%0,0,%3		# atomic_add\n\
 	add	%0,%2,%0\n"
 	PPC405_ERR77(0,%3)
-"	stwcx.	%0,0,%3 \n\
-	bne-	1b"
+"	stwcx.	%0,0,%3 \n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	: "=&r" (t), "+m" (v->counter)
 	: "r" (a), "r" (&v->counter)
-	: "cc");
+	: "cc" XENON_ATOMIC_CLOB);
 }
 
 static __inline__ int atomic_add_return(int a, atomic_t *v)
@@ -50,15 +52,17 @@ static __inline__ int atomic_add_return(
 
 	__asm__ __volatile__(
 	PPC_RELEASE_BARRIER
-"1:	lwarx	%0,0,%2		# atomic_add_return\n\
+"1:"	XENON_ATOMIC_PRE
+"	lwarx	%0,0,%2		# atomic_add_return\n\
 	add	%0,%1,%0\n"
 	PPC405_ERR77(0,%2)
-"	stwcx.	%0,0,%2 \n\
-	bne-	1b"
+"	stwcx.	%0,0,%2 \n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	PPC_ACQUIRE_BARRIER
 	: "=&r" (t)
 	: "r" (a), "r" (&v->counter)
-	: "cc", "memory");
+	: "cc", "memory" XENON_ATOMIC_CLOB);
 
 	return t;
 }
@@ -70,14 +74,16 @@ static __inline__ void atomic_sub(int a,
 	int t;
 
 	__asm__ __volatile__(
-"1:	lwarx	%0,0,%3		# atomic_sub\n\
+"1:"	XENON_ATOMIC_PRE
+"	lwarx	%0,0,%3		# atomic_sub\n\
 	subf	%0,%2,%0\n"
 	PPC405_ERR77(0,%3)
-"	stwcx.	%0,0,%3 \n\
-	bne-	1b"
+"	stwcx.	%0,0,%3 \n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	: "=&r" (t), "+m" (v->counter)
 	: "r" (a), "r" (&v->counter)
-	: "cc");
+	: "cc" XENON_ATOMIC_CLOB);
 }
 
 static __inline__ int atomic_sub_return(int a, atomic_t *v)
@@ -86,15 +92,17 @@ static __inline__ int atomic_sub_return(
 
 	__asm__ __volatile__(
 	PPC_RELEASE_BARRIER
-"1:	lwarx	%0,0,%2		# atomic_sub_return\n\
+"1:"	XENON_ATOMIC_PRE
+"	lwarx	%0,0,%2		# atomic_sub_return\n\
 	subf	%0,%1,%0\n"
 	PPC405_ERR77(0,%2)
-"	stwcx.	%0,0,%2 \n\
-	bne-	1b"
+"	stwcx.	%0,0,%2 \n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	PPC_ACQUIRE_BARRIER
 	: "=&r" (t)
 	: "r" (a), "r" (&v->counter)
-	: "cc", "memory");
+	: "cc", "memory" XENON_ATOMIC_CLOB);
 
 	return t;
 }
@@ -104,14 +112,16 @@ static __inline__ void atomic_inc(atomic
 	int t;
 
 	__asm__ __volatile__(
-"1:	lwarx	%0,0,%2		# atomic_inc\n\
+"1:"	XENON_ATOMIC_PRE
+"	lwarx	%0,0,%2		# atomic_inc\n\
 	addic	%0,%0,1\n"
 	PPC405_ERR77(0,%2)
-"	stwcx.	%0,0,%2 \n\
-	bne-	1b"
+"	stwcx.	%0,0,%2 \n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	: "=&r" (t), "+m" (v->counter)
 	: "r" (&v->counter)
-	: "cc", "xer");
+	: "cc", "xer" XENON_ATOMIC_CLOB);
 }
 
 static __inline__ int atomic_inc_return(atomic_t *v)
@@ -120,15 +130,17 @@ static __inline__ int atomic_inc_return(
 
 	__asm__ __volatile__(
 	PPC_RELEASE_BARRIER
-"1:	lwarx	%0,0,%1		# atomic_inc_return\n\
+"1:"	XENON_ATOMIC_PRE
+"	lwarx	%0,0,%1		# atomic_inc_return\n\
 	addic	%0,%0,1\n"
 	PPC405_ERR77(0,%1)
-"	stwcx.	%0,0,%1 \n\
-	bne-	1b"
+"	stwcx.	%0,0,%1 \n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	PPC_ACQUIRE_BARRIER
 	: "=&r" (t)
 	: "r" (&v->counter)
-	: "cc", "xer", "memory");
+	: "cc", "xer", "memory" XENON_ATOMIC_CLOB);
 
 	return t;
 }
@@ -148,14 +160,16 @@ static __inline__ void atomic_dec(atomic
 	int t;
 
 	__asm__ __volatile__(
-"1:	lwarx	%0,0,%2		# atomic_dec\n\
+"1:"	XENON_ATOMIC_PRE
+"	lwarx	%0,0,%2		# atomic_dec\n\
 	addic	%0,%0,-1\n"
 	PPC405_ERR77(0,%2)\
-"	stwcx.	%0,0,%2\n\
-	bne-	1b"
+"	stwcx.	%0,0,%2\n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	: "=&r" (t), "+m" (v->counter)
 	: "r" (&v->counter)
-	: "cc", "xer");
+	: "cc", "xer" XENON_ATOMIC_CLOB);
 }
 
 static __inline__ int atomic_dec_return(atomic_t *v)
@@ -164,15 +178,17 @@ static __inline__ int atomic_dec_return(
 
 	__asm__ __volatile__(
 	PPC_RELEASE_BARRIER
-"1:	lwarx	%0,0,%1		# atomic_dec_return\n\
+"1:"	XENON_ATOMIC_PRE
+"	lwarx	%0,0,%1		# atomic_dec_return\n\
 	addic	%0,%0,-1\n"
 	PPC405_ERR77(0,%1)
-"	stwcx.	%0,0,%1\n\
-	bne-	1b"
+"	stwcx.	%0,0,%1\n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	PPC_ACQUIRE_BARRIER
 	: "=&r" (t)
 	: "r" (&v->counter)
-	: "cc", "xer", "memory");
+	: "cc", "xer", "memory" XENON_ATOMIC_CLOB);
 
 	return t;
 }
@@ -195,19 +211,22 @@ static __inline__ int atomic_add_unless(
 
 	__asm__ __volatile__ (
 	PPC_RELEASE_BARRIER
-"1:	lwarx	%0,0,%1		# atomic_add_unless\n\
+"1:"	XENON_ATOMIC_PRE
+"	lwarx	%0,0,%1		# atomic_add_unless\n\
 	cmpw	0,%0,%3 \n\
 	beq-	2f \n\
 	add	%0,%2,%0 \n"
 	PPC405_ERR77(0,%2)
-"	stwcx.	%0,0,%1 \n\
-	bne-	1b \n"
+"	stwcx.	%0,0,%1 \n"
+	XENON_ATOMIC_POST
+"	bne-	1b \n"
 	PPC_ACQUIRE_BARRIER
 "	subf	%0,%2,%0 \n\
-2:"
-	: "=&r" (t)
+	b	3f \n\
+2:"	XENON_ATOMIC_POST
+"3:"	: "=&r" (t)
 	: "r" (&v->counter), "r" (a), "r" (u)
-	: "cc", "memory");
+	: "cc", "memory" XENON_ATOMIC_CLOB);
 
 	return t != u;
 }
@@ -228,18 +247,21 @@ static __inline__ int atomic_dec_if_posi
 
 	__asm__ __volatile__(
 	PPC_RELEASE_BARRIER
-"1:	lwarx	%0,0,%1		# atomic_dec_if_positive\n\
+"1:"	XENON_ATOMIC_PRE
+"	lwarx	%0,0,%1		# atomic_dec_if_positive\n\
 	cmpwi	%0,1\n\
 	addi	%0,%0,-1\n\
 	blt-	2f\n"
 	PPC405_ERR77(0,%1)
-"	stwcx.	%0,0,%1\n\
-	bne-	1b"
+"	stwcx.	%0,0,%1\n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	PPC_ACQUIRE_BARRIER
-	"\n\
-2:"	: "=&b" (t)
+"	b	3f\n\
+2:"	XENON_ATOMIC_POST
+"3:"	: "=&b" (t)
 	: "r" (&v->counter)
-	: "cc", "memory");
+	: "cc", "memory" XENON_ATOMIC_CLOB);
 
 	return t;
 }
@@ -272,13 +294,15 @@ static __inline__ void atomic64_add(long
 	long t;
 
 	__asm__ __volatile__(
-"1:	ldarx	%0,0,%3		# atomic64_add\n\
+"1:"	XENON_ATOMIC_PRE
+"	ldarx	%0,0,%3		# atomic64_add\n\
 	add	%0,%2,%0\n\
-	stdcx.	%0,0,%3 \n\
-	bne-	1b"
+	stdcx.	%0,0,%3 \n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	: "=&r" (t), "+m" (v->counter)
 	: "r" (a), "r" (&v->counter)
-	: "cc");
+	: "cc" XENON_ATOMIC_CLOB);
 }
 
 static __inline__ long atomic64_add_return(long a, atomic64_t *v)
@@ -287,14 +311,16 @@ static __inline__ long atomic64_add_retu
 
 	__asm__ __volatile__(
 	PPC_RELEASE_BARRIER
-"1:	ldarx	%0,0,%2		# atomic64_add_return\n\
+"1:"	XENON_ATOMIC_PRE
+"	ldarx	%0,0,%2		# atomic64_add_return\n\
 	add	%0,%1,%0\n\
-	stdcx.	%0,0,%2 \n\
-	bne-	1b"
+	stdcx.	%0,0,%2 \n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	PPC_ACQUIRE_BARRIER
 	: "=&r" (t)
 	: "r" (a), "r" (&v->counter)
-	: "cc", "memory");
+	: "cc", "memory" XENON_ATOMIC_CLOB);
 
 	return t;
 }
@@ -306,13 +332,15 @@ static __inline__ void atomic64_sub(long
 	long t;
 
 	__asm__ __volatile__(
-"1:	ldarx	%0,0,%3		# atomic64_sub\n\
+"1:"	XENON_ATOMIC_PRE
+"	ldarx	%0,0,%3		# atomic64_sub\n\
 	subf	%0,%2,%0\n\
-	stdcx.	%0,0,%3 \n\
-	bne-	1b"
+	stdcx.	%0,0,%3 \n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	: "=&r" (t), "+m" (v->counter)
 	: "r" (a), "r" (&v->counter)
-	: "cc");
+	: "cc" XENON_ATOMIC_CLOB);
 }
 
 static __inline__ long atomic64_sub_return(long a, atomic64_t *v)
@@ -321,14 +349,16 @@ static __inline__ long atomic64_sub_retu
 
 	__asm__ __volatile__(
 	PPC_RELEASE_BARRIER
-"1:	ldarx	%0,0,%2		# atomic64_sub_return\n\
+"1:"	XENON_ATOMIC_PRE
+"	ldarx	%0,0,%2		# atomic64_sub_return\n\
 	subf	%0,%1,%0\n\
-	stdcx.	%0,0,%2 \n\
-	bne-	1b"
+	stdcx.	%0,0,%2 \n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	PPC_ACQUIRE_BARRIER
 	: "=&r" (t)
 	: "r" (a), "r" (&v->counter)
-	: "cc", "memory");
+	: "cc", "memory" XENON_ATOMIC_CLOB);
 
 	return t;
 }
@@ -338,13 +368,15 @@ static __inline__ void atomic64_inc(atom
 	long t;
 
 	__asm__ __volatile__(
-"1:	ldarx	%0,0,%2		# atomic64_inc\n\
+"1:"	XENON_ATOMIC_PRE
+"	ldarx	%0,0,%2		# atomic64_inc\n\
 	addic	%0,%0,1\n\
-	stdcx.	%0,0,%2 \n\
-	bne-	1b"
+	stdcx.	%0,0,%2 \n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	: "=&r" (t), "+m" (v->counter)
 	: "r" (&v->counter)
-	: "cc", "xer");
+	: "cc", "xer" XENON_ATOMIC_CLOB);
 }
 
 static __inline__ long atomic64_inc_return(atomic64_t *v)
@@ -353,14 +385,16 @@ static __inline__ long atomic64_inc_retu
 
 	__asm__ __volatile__(
 	PPC_RELEASE_BARRIER
-"1:	ldarx	%0,0,%1		# atomic64_inc_return\n\
+"1:"	XENON_ATOMIC_PRE
+"	ldarx	%0,0,%1		# atomic64_inc_return\n\
 	addic	%0,%0,1\n\
-	stdcx.	%0,0,%1 \n\
-	bne-	1b"
+	stdcx.	%0,0,%1 \n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	PPC_ACQUIRE_BARRIER
 	: "=&r" (t)
 	: "r" (&v->counter)
-	: "cc", "xer", "memory");
+	: "cc", "xer", "memory" XENON_ATOMIC_CLOB);
 
 	return t;
 }
@@ -380,13 +414,15 @@ static __inline__ void atomic64_dec(atom
 	long t;
 
 	__asm__ __volatile__(
-"1:	ldarx	%0,0,%2		# atomic64_dec\n\
+"1:"	XENON_ATOMIC_PRE
+"	ldarx	%0,0,%2		# atomic64_dec\n\
 	addic	%0,%0,-1\n\
-	stdcx.	%0,0,%2\n\
-	bne-	1b"
+	stdcx.	%0,0,%2\n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	: "=&r" (t), "+m" (v->counter)
 	: "r" (&v->counter)
-	: "cc", "xer");
+	: "cc", "xer" XENON_ATOMIC_CLOB);
 }
 
 static __inline__ long atomic64_dec_return(atomic64_t *v)
@@ -395,14 +431,16 @@ static __inline__ long atomic64_dec_retu
 
 	__asm__ __volatile__(
 	PPC_RELEASE_BARRIER
-"1:	ldarx	%0,0,%1		# atomic64_dec_return\n\
+"1:"	XENON_ATOMIC_PRE
+"	ldarx	%0,0,%1		# atomic64_dec_return\n\
 	addic	%0,%0,-1\n\
-	stdcx.	%0,0,%1\n\
-	bne-	1b"
+	stdcx.	%0,0,%1\n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	PPC_ACQUIRE_BARRIER
 	: "=&r" (t)
 	: "r" (&v->counter)
-	: "cc", "xer", "memory");
+	: "cc", "xer", "memory" XENON_ATOMIC_CLOB);
 
 	return t;
 }
@@ -420,16 +458,19 @@ static __inline__ long atomic64_dec_if_p
 
 	__asm__ __volatile__(
 	PPC_RELEASE_BARRIER
-"1:	ldarx	%0,0,%1		# atomic64_dec_if_positive\n\
+"1:"	XENON_ATOMIC_PRE
+"	ldarx	%0,0,%1		# atomic64_dec_if_positive\n\
 	addic.	%0,%0,-1\n\
 	blt-	2f\n\
-	stdcx.	%0,0,%1\n\
-	bne-	1b"
+	stdcx.	%0,0,%1\n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	PPC_ACQUIRE_BARRIER
-	"\n\
-2:"	: "=&r" (t)
+"	b	3f\n\
+2:"	XENON_ATOMIC_POST
+"3:"	: "=&r" (t)
 	: "r" (&v->counter)
-	: "cc", "xer", "memory");
+	: "cc", "xer", "memory" XENON_ATOMIC_CLOB);
 
 	return t;
 }
@@ -452,18 +493,21 @@ static __inline__ int atomic64_add_unles
 
 	__asm__ __volatile__ (
 	PPC_RELEASE_BARRIER
-"1:	ldarx	%0,0,%1		# atomic_add_unless\n\
+"1:"	XENON_ATOMIC_PRE
+"	ldarx	%0,0,%1		# atomic_add_unless\n\
 	cmpd	0,%0,%3 \n\
 	beq-	2f \n\
 	add	%0,%2,%0 \n"
-"	stdcx.	%0,0,%1 \n\
-	bne-	1b \n"
+"	stdcx.	%0,0,%1 \n"
+	XENON_ATOMIC_POST
+"	bne-	1b \n"
 	PPC_ACQUIRE_BARRIER
 "	subf	%0,%2,%0 \n\
-2:"
-	: "=&r" (t)
+	b	3f \n\
+2:"	XENON_ATOMIC_POST
+"3:"	: "=&r" (t)
 	: "r" (&v->counter), "r" (a), "r" (u)
-	: "cc", "memory");
+	: "cc", "memory" XENON_ATOMIC_CLOB);
 
 	return t != u;
 }
diff -NurpP --minimal linux-2.6.38-rc3-xbox0.11/arch/powerpc/include/asm/pgtable-ppc64.h linux-2.6.38-rc3-xbox0.11.1/arch/powerpc/include/asm/pgtable-ppc64.h
--- linux-2.6.38-rc3-xbox0.11/arch/powerpc/include/asm/pgtable-ppc64.h	2011-02-08 00:33:26.000000000 +0100
+++ linux-2.6.38-rc3-xbox0.11.1/arch/powerpc/include/asm/pgtable-ppc64.h	2011-02-08 08:20:20.000000000 +0100
@@ -210,15 +210,17 @@ static inline unsigned long pte_update(s
 	unsigned long old, tmp;
 
 	__asm__ __volatile__(
-	"1:	ldarx	%0,0,%3		# pte_update\n\
+"1:"	XENON_ATOMIC_PRE
+"2:	ldarx	%0,0,%3		# pte_update\n\
 	andi.	%1,%0,%6\n\
-	bne-	1b \n\
+	bne-	2b \n\
 	andc	%1,%0,%4 \n\
-	stdcx.	%1,0,%3 \n\
-	bne-	1b"
+	stdcx.	%1,0,%3 \n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	: "=&r" (old), "=&r" (tmp), "=m" (*ptep)
 	: "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY)
-	: "cc" );
+	: "cc" XENON_ATOMIC_CLOB);
 #else
 	unsigned long old = pte_val(*ptep);
 	*ptep = __pte(old & ~clr);
@@ -317,15 +319,17 @@ static inline void __ptep_set_access_fla
 	unsigned long old, tmp;
 
 	__asm__ __volatile__(
-	"1:	ldarx	%0,0,%4\n\
-		andi.	%1,%0,%6\n\
-		bne-	1b \n\
-		or	%0,%3,%0\n\
-		stdcx.	%0,0,%4\n\
-		bne-	1b"
+"1:"	XENON_ATOMIC_PRE
+"2:	ldarx	%0,0,%4\n\
+	andi.	%1,%0,%6\n\
+	bne-	2b \n\
+	or	%0,%3,%0\n\
+	stdcx.	%0,0,%4\n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	:"=&r" (old), "=&r" (tmp), "=m" (*ptep)
 	:"r" (bits), "r" (ptep), "m" (*ptep), "i" (_PAGE_BUSY)
-	:"cc");
+	:"cc" XENON_ATOMIC_CLOB);
 #else
 	unsigned long old = pte_val(*ptep);
 	*ptep = __pte(old | bits);
diff -NurpP --minimal linux-2.6.38-rc3-xbox0.11/arch/powerpc/include/asm/pgtable.h linux-2.6.38-rc3-xbox0.11.1/arch/powerpc/include/asm/pgtable.h
--- linux-2.6.38-rc3-xbox0.11/arch/powerpc/include/asm/pgtable.h	2010-11-22 21:40:18.000000000 +0100
+++ linux-2.6.38-rc3-xbox0.11.1/arch/powerpc/include/asm/pgtable.h	2011-02-08 08:28:43.000000000 +0100
@@ -6,6 +6,7 @@
 #include <asm/processor.h>		/* For TASK_SIZE */
 #include <asm/mmu.h>
 #include <asm/page.h>
+#include <asm/xenon.h>
 
 struct mm_struct;
 
diff -NurpP --minimal linux-2.6.38-rc3-xbox0.11/arch/powerpc/include/asm/system.h linux-2.6.38-rc3-xbox0.11.1/arch/powerpc/include/asm/system.h
--- linux-2.6.38-rc3-xbox0.11/arch/powerpc/include/asm/system.h	2011-02-08 00:33:26.000000000 +0100
+++ linux-2.6.38-rc3-xbox0.11.1/arch/powerpc/include/asm/system.h	2011-02-08 08:27:34.000000000 +0100
@@ -8,6 +8,7 @@
 #include <linux/irqflags.h>
 
 #include <asm/hw_irq.h>
+#include <asm/xenon.h>
 
 /*
  * Memory barrier.
@@ -281,14 +282,16 @@ __xchg_u64(volatile void *p, unsigned lo
 
 	__asm__ __volatile__(
 	PPC_RELEASE_BARRIER
-"1:	ldarx	%0,0,%2 \n"
+"1:"	XENON_ATOMIC_PRE
+"	ldarx	%0,0,%2 \n"
 	PPC405_ERR77(0,%2)
-"	stdcx.	%3,0,%2 \n\
-	bne-	1b"
+"	stdcx.	%3,0,%2 \n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	PPC_ACQUIRE_BARRIER
 	: "=&r" (prev), "+m" (*(volatile unsigned long *)p)
 	: "r" (p), "r" (val)
-	: "cc", "memory");
+	: "cc", "memory" XENON_ATOMIC_CLOB);
 
 	return prev;
 }
@@ -299,13 +302,15 @@ __xchg_u64_local(volatile void *p, unsig
 	unsigned long prev;
 
 	__asm__ __volatile__(
-"1:	ldarx	%0,0,%2 \n"
+"1:"	XENON_ATOMIC_PRE
+"	ldarx	%0,0,%2 \n"
 	PPC405_ERR77(0,%2)
-"	stdcx.	%3,0,%2 \n\
-	bne-	1b"
+"	stdcx.	%3,0,%2 \n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	: "=&r" (prev), "+m" (*(volatile unsigned long *)p)
 	: "r" (p), "r" (val)
-	: "cc", "memory");
+	: "cc", "memory" XENON_ATOMIC_CLOB);
 
 	return prev;
 }
@@ -418,17 +423,19 @@ __cmpxchg_u64(volatile unsigned long *p,
 
 	__asm__ __volatile__ (
 	PPC_RELEASE_BARRIER
-"1:	ldarx	%0,0,%2		# __cmpxchg_u64\n\
+"1:"	XENON_ATOMIC_PRE
+"	ldarx	%0,0,%2		# __cmpxchg_u64\n\
 	cmpd	0,%0,%3\n\
 	bne-	2f\n\
-	stdcx.	%4,0,%2\n\
-	bne-	1b"
+	stdcx.	%4,0,%2\n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
 	PPC_ACQUIRE_BARRIER
-	"\n\
-2:"
-	: "=&r" (prev), "+m" (*p)
+"	b	3f\n\
+2:"	XENON_ATOMIC_POST
+"3:"	: "=&r" (prev), "+m" (*p)
 	: "r" (p), "r" (old), "r" (new)
-	: "cc", "memory");
+	: "cc", "memory" XENON_ATOMIC_CLOB);
 
 	return prev;
 }
@@ -440,14 +447,16 @@ __cmpxchg_u64_local(volatile unsigned lo
 	unsigned long prev;
 
 	__asm__ __volatile__ (
-"1:	ldarx	%0,0,%2		# __cmpxchg_u64\n\
+"1:"	XENON_ATOMIC_PRE
+"	ldarx	%0,0,%2		# __cmpxchg_u64\n\
 	cmpd	0,%0,%3\n\
 	bne-	2f\n\
-	stdcx.	%4,0,%2\n\
-	bne-	1b"
-	"\n\
-2:"
-	: "=&r" (prev), "+m" (*p)
+	stdcx.	%4,0,%2\n"
+	XENON_ATOMIC_POST
+"	bne-	1b"
+"	b	3f\n\
+2:"	XENON_ATOMIC_POST
+"3:"	: "=&r" (prev), "+m" (*p)
 	: "r" (p), "r" (old), "r" (new)
 	: "cc", "memory");
 
diff -NurpP --minimal linux-2.6.38-rc3-xbox0.11/arch/powerpc/include/asm/xenon.h linux-2.6.38-rc3-xbox0.11.1/arch/powerpc/include/asm/xenon.h
--- linux-2.6.38-rc3-xbox0.11/arch/powerpc/include/asm/xenon.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.6.38-rc3-xbox0.11.1/arch/powerpc/include/asm/xenon.h	2011-02-08 09:23:30.000000000 +0100
@@ -0,0 +1,14 @@
+#ifndef _ASM_POWERPC_XENON_H_
+#define _ASM_POWERPC_XENON_H_
+
+#define	XENON_ATOMIC_PRE			\
+	"	mfmsr   %%r11\n"		\
+	"	lis	%%r12, 0x8015\n"	\
+	"	mtmsrd  %%r12, 1\n"
+
+#define	XENON_ATOMIC_POST			\
+	"	mtmsrd  %%r11, 1\n"
+
+#define	XENON_ATOMIC_CLOB	, "r11", "r12"
+
+#endif /* _ASM_POWERPC_XENON_H_ */
