//  MAIN_pinwatch.c

/*  Copyright (C) 2016 H.Poetzl
**      
**  This program is free software: you can redistribute it and/or
**  modify it under the terms of the GNU General Public License
**  as published by the Free Software Foundation, either version
**  2 of the License, or (at your option) any later version.
**
*/


#define F_CPU 16000000 

#include <avr/io.h>
#include <avr/interrupt.h>
#include <util/delay.h>
#include <stdint.h>


uint64_t cycle = 0;
uint8_t col = 0;

static uint8_t gpin[7] = { 0 };
static uint8_t gddr[7] = { 0 };
static uint8_t gport[7] = { 0 };

/*	masked are:
	PB0-6 ... PN532
	PD5/6 ... RX/TXCAN
	PE0/1 ... RX/TXD0
	PE6/7 ... LVL/PN
	PG5-7 ... missing	*/

static uint8_t mask[7] = { 0, 0x7F, 0, 0x60, 0xC3, 0x0, 0xE0 };


static inline
void uart0_tx(char chr)
{
    while (!(UCSR0A & (1<<UDRE0)));
    UDR0 = chr;
    col++;
}

static inline
void uart0_tx_hex(uint8_t val)
{
    char chr = '0' + (val & 0xF);

    if (chr > '9')
	chr += 'A' - '9' - 1;
    uart0_tx(chr);
}

static inline
void uart0_tx_byte(uint8_t val)
{
    uart0_tx_hex(val >> 4);
    uart0_tx_hex(val & 0xF);
}

static inline
void uart0_tx_uint16(uint16_t val)
{
    uart0_tx_byte(val >> 8);
    uart0_tx_byte(val & 0xFF);
}

static inline
void uart0_tx_uint32(uint32_t val)
{
    uart0_tx_uint16(val >> 16);
    uart0_tx_uint16(val & 0xFFFF);
}

static inline
void uart0_tx_uint64(uint64_t val)
{
    uart0_tx_uint32(val >> 32L);
    uart0_tx_uint32(val & 0xFFFFFFFFL);
}

static inline
void uart0_tx_newline(void)
{
    uart0_tx('\r');
    uart0_tx('\n');
    col = 0;
}



static inline
void check(uint8_t idx, uint8_t pin, uint8_t ddr, uint8_t port)
{
    if (((pin ^ gpin[idx]) & ~mask[idx]) || 
	((ddr ^ gddr[idx]) & ~mask[idx]) || 
	((port ^ gport[idx]) & ~mask[idx])) {

	if (col)
	    uart0_tx_newline();
	    
	uart0_tx('A' + idx);
	uart0_tx(':');
	uart0_tx(' ');
	uart0_tx_byte(gpin[idx]);
	uart0_tx('/');
	uart0_tx_byte(gddr[idx]);
	uart0_tx('/');
	uart0_tx_byte(gport[idx]);
	uart0_tx(' ');
	uart0_tx('-');
	uart0_tx('>');
	uart0_tx(' ');
	uart0_tx_byte(pin);
	uart0_tx('/');
	uart0_tx_byte(ddr);
	uart0_tx('/');
	uart0_tx_byte(port);
	uart0_tx(' ');
	uart0_tx('#');
	uart0_tx_uint64(cycle);
	uart0_tx_newline();

	gpin[idx] = pin;
	gddr[idx] = ddr;
	gport[idx] = port;
    }
}


ISR (BADISR_vect)
{
    uart0_tx('$');
    asm("jmp 0");
}

void bad_pc(void)
{
    uart0_tx('%');
    asm("jmp 0");
}

int main(void)
{
    uint8_t res;

    res = MCUSR;
    MCUSR = 0;

    cli();

    UBRR0H = 0;
    UBRR0L = 13;			// 115200 @ 12MHz
    UBRR0L = 39;			// 38400 @ 12MHz
    UBRR0L = 52;			// 38400 @ 16MHz

    UCSR0A = (1<<U2X0);			// 2x mode
    UCSR0B = (1<<RXEN0)|(1<<TXEN0);	// enable
    UCSR0C = (3<<UCSZ00);		// 8-bit

    DDRA = 0x00;			// all in
    PORTA = 0xFF;			// all pullup

    DDRB = 0x47;			// #RTSPD, MOSI, SCK, #SS
    PORTB = 0xFF;			// all pullup

    DDRC = 0x00;			// all in
    PORTC = 0xFF;			// all pullup

    DDRD = 0x00;			// all in
    PORTD = 0xFF;			// all pullup

    DDRE = 0x40;			// LVL_EN
    PORTE = 0xFF;			// all pullup

    DDRF = 0x00;			// all in
    PORTF = 0xFF;			// all pullup

    DDRG = 0x00;			// all in
    PORTG = 0xFF;			// all pullup

    _delay_ms(100);

    uart0_tx_newline();
    uart0_tx('@');
    uart0_tx_byte(res);
    uart0_tx_newline();

    uart0_tx('#');
    uart0_tx_uint64(0x123456789ABCDEF0);
    uart0_tx_newline();

    _delay_ms(100);

    uint8_t prev = 0;

    while (1) {
	check(0, PINA, DDRA, PORTA);
	check(1, PINB, DDRB, PORTB);
	check(2, PINC, DDRC, PORTC);
	check(3, PIND, DDRD, PORTD);
	check(4, PINE, DDRE, PORTE);
	check(5, PINF, DDRF, PORTF);
	check(6, PING, DDRG, PORTG);

	cycle++;
	
	uint8_t this = (cycle >> 16) & 0xFF;

        if (this ^ prev) {
	    if (this & 0xF) {
		uart0_tx('.');
	    } else {
		if (col)
		    uart0_tx_newline();

		uart0_tx('#');
		uart0_tx_uint64(cycle);
		uart0_tx_newline();
	    }

	    switch (this >> 4) {
	    case 0:
		PORTB = ~0x00;
		PORTE = ~0x00;
		break;
	    case 1:
		PORTB = ~0x40;
		PORTE = ~0x00;
		break;
	    case 2:
		PORTB = ~0x00;
		PORTE = ~0x40;
		break;
	    case 3:
		PORTB = ~0x40;
		PORTE = ~0x40;
		break;
	    }

	    prev = this;
	}
    }

    uart0_tx('*');
    while (1); 

    asm("LDI PC,0");
    asm("LDI PC,0");
    asm("LDI PC,0");
    asm("LDI PC,0");
    asm("LDI PC,0");
    asm("LDI PC,0");
}