;  Copyright (C) 2019 Nira Tubert
	;	
	;  This program is free software: you can redistribute it and/or
	;  modify it under the terms of the GNU General Public License
	;  as published by the Free Software Foundation, either version
	;  2 of the License, or (at your option) any later version.
	;

	PROCESSOR	16F1718
	RADIX		dec

	INCLUDE "p16f1718.inc"

	__config _CONFIG1, _FOSC_INTOSC & _WDTE_OFF & _MCLRE_ON & _BOREN_ON & _FCMEN_OFF
	__config _CONFIG2, _PLLEN_OFF & _ZCDDIS_ON & _PPS1WAY_OFF

	; reset vector

	ORG __VECTOR_RESET
	PAGESEL init
	GOTO	init

init:	BANKSEL	LATB
	BSF	LATB,7		; RB7 default high

	BANKSEL	TRISB
	BCF	TRISB,7		; RB7 out

	BANKSEL	ANSELB
	CLRF	ANSELB

	; setup EUSART Asynchronous Mode

	BANKSEL	TX1STA
	MOVLW	0        	; Baud rate 1Mbps
	MOVWF	SPBRG

	BSF	TX1STA,BRGH	; High speed baud rate
	BSF	RC1STA,SPEN
	BSF	TX1STA,TXEN	; Configures TX1STA as 8 bit transmission, transmit enabled, async mode... TXIF set

	BANKSEL	OSCCON    
	MOVLW	01111000b	; IRCF to 16MHz
	MOVWF	OSCCON


	BANKSEL	RB7PPS
	MOVLW	10100b		; Output Source Selection TX/CK
	MOVWF	RB7PPS
	GOTO	main

let:    BANKSEL	TX1STA
letl:	BTFSS	TX1STA,TRMT
	GOTO	letl
	MOVWF	TX1REG
	RETURN

main:	MOVLW	'L'
	CALL	let
	MOVLW	'H'
	CALL	letl		; We have not changed bank

stop:	GOTO	stop    	
	end