HIGH SPEED IO
Copyright (C) 2015 Herbert Pötzl
Licensed under CERN OHL v.1.2
Triple PMOD
Dual Plugin Module
V1.2
R1.0
AXIOM BETA DPM 3xPMOD
TOP SIDE V1.2 R1.0
AXIOM BETA DPM 3xPMOD
BOTTOM SIDE V1.2 R1.0
>NAME
>VALUE
>NAME
<b>LEDs</b><p>
<author>Created by librarian@cadsoft.de</author><br>
Extended by Federico Battaglin <author><federico.rd@fdpinternational.com></author> with DUOLED
<b>CHIPLED</b><p>
Source: http://www.osram.convergy.de/ ... LG_LY Q971.pdf
>NAME
>VALUE
<b>Resistors in DIL Packages</b><p>
<author>Created by librarian@cadsoft.de</author>
<b>BOURNS</b> Chip Resistor Array<p>
Source: RS Component / BUORNS
>NAME
>VALUE
>NAME
>VALUE
>NAME
>VALUE
>NAME
>VALUE
<b>EAGLE Design Rules</b>
<p>
Die Standard-Design-Rules sind so gewählt, dass sie für
die meisten Anwendungen passen. Sollte ihre Platine
besondere Anforderungen haben, treffen Sie die erforderlichen
Einstellungen hier und speichern die Design Rules unter
einem neuen Namen ab.
<b>Laen's PCB Order Design Rules</b>
<p>
Please make sure your boards conform to these design rules.
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