PCIE-NORTH

      SDI Artix                         Beta Zynq               Comment

  A12 B15_L7_N          LVDS_5A *       U7  BANK13_00_P cc      SDI Clock
  B12 B15_L7_P          LVDS_5B *       V7  BANK13_00_N cc      SDI Clock

  A10 B15_L5_N          LVDS_4A         W8  BANK13_02_N         TMDS d0
  B10 B15_L5_P          LVDS_4B         V8  BANK13_02_P         TMDS d0

  D8  B15_L1_P          LVDS_3A         T5  BANK13_03_P         TMDS d1
  C8  B15_L1_N          LVDS_3B         U5  BANK13_03_N         TMDS d1

  A15 B15_L10_N         LVDS_2A *       P15 JX1_23_P
  B14 B15_L10_P         LVDS_2B *       P16 JX1_23_N

  C12 B15_L6_N          LVDS_1A *       W18 JX1_21_P
  D11 B15_L6_P          LVDS_1B *       W19 JX1_21_N

  B16 B15_L15_P         LVDS_0A         T17 JX1_19_P
  A17 B15_L15_N         LVDS_0B         R18 JX1_19_N


PCIE-SOUTH

  G17 B15_L19_P         LVDS_5A         K14 JX2_18_P
  F18 B15_L19_N         LVDS_5B         J14 JX2_18_N

  C17 B15_L18_P         LVDS_4A         N15 JX2_20_P
  C18 B15_L18_N         LVDS_4B         N16 JX2_20_N

  H18 B15_L23_N         LVDS_3A         M15 JX2_22_N
  H17 B15_L23_P         LVDS_3B         M14 JX2_22_P

  D14 B15_L12_N cc      LVDS_2A         W6  BANK13_06_N
  E13 B15_L12_P cc      LVDS_2B         V6  BANK13_06_P

  E15 B15_L13_P cc      LVDS_1A         Y12 BANK13_04_P         TMDS clk
  D15 B15_L13_N cc      LVDS_1B         Y13 BANK13_04_N         TMDS clk

  G14 B15_L22_P         LVDS_0A         V11 BANK13_05_P         TMDS d2
  F14 B15_L22_N         LVDS_0B         V10 BANK13_05_N         TMDS d2