// tdm.c // // time division multiplexing /* Copyright (C) 2017 H.Poetzl ** ** This program is free software: you can redistribute it and/or ** modify it under the terms of the GNU General Public License ** as published by the Free Software Foundation, either version ** 2 of the License, or (at your option) any later version. */ // ------------------------------------------------ // configuration #define NO_BIT_DEFINES #include #include #define CONFIG(k, n) __code static char __at _ ## k __ ## k = n CONFIG(CONFIG1, _FEXTOSC_OFF & _RSTOSC_HFINT1 & _CSWEN_ON & _CLKOUTEN_OFF); CONFIG(CONFIG2, _MCLRE_ON & _WDTE_OFF & _PPS1WAY_OFF); #include "tear_leds.h" void irq(void) __interrupt 0 { PIR0bits.TMR0IF = 0; } // -------------------------------------------------- // and our main entry point void main() { // all digital ANSELA = 0; ANSELB = 0; ANSELC = 0; // all input TRISA = 0xFF; TRISB = 0xFF; TRISC = 0xFF; // all one LATA = 0xFF; LATB = 0xFF; LATC = 0xFF; // all open drain ODCONA = 0xFF; ODCONB = 0xFF; ODCONC = 0xFF; __asm BANKSEL TRISA BCF LED0T,LED0 BCF LED1T,LED1 BCF LED2T,LED2 BCF LED3T,LED3 BCF LED4T,LED4 BCF LED5T,LED5 BCF LED6T,LED6 BCF LED7T,LED7 BCF LED8T,LED8 BCF LED9T,LED9 BCF LEDAT,LEDA BCF LEDBT,LEDB BCF LEDCT,LEDC BCF LEDDT,LEDD BCF LEDET,LEDE BCF LEDFT,LEDF __endasm; OSCCON3bits.CSWHOLD = 0; OSCCON1bits.NDIV = 1; /* configure Timer 0 */ T0CON0 = 0; T0CON0bits.T0EN = 1; T0CON0bits.T016BIT = 0; T0CON0bits.T0OUTPS = 0b0000; /* Postscaler = 1 */ T0CON1 = 0; T0CON1bits.T0CS = 0b100; /* Source = LFINTOSC */ T0CON1bits.T0CS = 0b011; /* Source = HFINTOSC */ T0CON1bits.T0ASYNC = 1; T0CON1bits.T0CKPS = 0b0000; /* Prescaler = 1 */ TMR0H = 0x80; TMR0L = 0x00; PMD0 = 0xC3; /* All */ PMD1 = 0xFE; /* All but Timer 0 */ PMD2 = 0x66; /* All */ PMD3 = 0xFF; /* All */ PMD4 = 0x22; /* All */ PMD5 = 0x1F; /* All */ PIR0bits.TMR0IF = 0; /* clear TMR0 irq */ PIE0bits.TMR0IE = 1; /* enable TMR0 irq */ INTCONbits.PEIE = 1; /* enable peripheral irq */ INTCONbits.GIE = 1; /* enable global irq */ while (1) { __asm BANKSEL TMR0H MOVLW 0xF0 MOVWF TMR0H BANKSEL LED0L BCF LED0L,LED0 SLEEP BSF LED0L,LED0 BCF LED1L,LED1 SLEEP BSF LED1L,LED1 BCF LED2L,LED2 SLEEP BSF LED2L,LED2 BCF LED3L,LED3 SLEEP BSF LED3L,LED3 BCF LED4L,LED4 SLEEP BSF LED4L,LED4 BCF LED5L,LED5 SLEEP BSF LED5L,LED5 BCF LED6L,LED6 SLEEP BSF LED6L,LED6 BCF LED7L,LED7 SLEEP BSF LED7L,LED7 BANKSEL TMR0H MOVLW 0x10 MOVWF TMR0H CLRF TMR0L BANKSEL LED8L BCF LED8L,LED8 SLEEP BSF LED8L,LED8 BCF LED9L,LED9 SLEEP BSF LED9L,LED9 BCF LEDAL,LEDA SLEEP BSF LEDAL,LEDA BCF LEDBL,LEDB SLEEP BSF LEDBL,LEDB BCF LEDCL,LEDC SLEEP BSF LEDCL,LEDC __endasm; } }